NEC’s LOW POWER
GPS RF RECEIVER
BIPOLAR ANALOG + INTEGRATED CIRCUIT
UPB1009K
DESCRIPTION
The μ PB1009K is a silicon monolithic IC developed for GPS receivers. This IC integrates a full VCO, second IF
filter, 4-bit ADC, and digital control interface to reduce cost and mounting space. In addition, its power consumption
is low.
Moreover, use of a TCXO with frequency of 16.368 MHz/16.384 MHz, 14.4 MHz, 19.2 MHz, or 26 MHz switchable
with an on-chip divider is possible.
NEC’s stringent quality assurance and test procedures ensure the highest reliability and performance.
FEATURES
? Double conversion
? Multiple system clocks
? A/D converter
? High-density RF block
? Supply voltage
? Low current consumption
? High-density surface mountable
: f REFin = 16.368 MHz, f 1stIFin = 61.380 MHz, f 2ndIFin = 4.092 MHz
: f REFin = 14.4, 16.384, 19.2, 26 MHz, f 1stIFin = 62.980 MHz, f 2ndIFin = 2.556 MHz
: On-chip switchable frequency divider (1/N = 100, 3/256, 9/1024, 65/4096)
: On-chip 4-bit A/D converter
: On-chip VCO tank circuit and 2ndIF filter
: V CC = 2.7 to 3.3 V
: I CC = 26.0 mA TYP. @ V CC = 3.0 V, N = 100
: 44-pin plastic QFN
APPLICATIONS
? Consumer use GPS receiver of reference frequency 16.368 MHz, 2nd IF frequency 4.092 MHz
? Consumer use GPS receiver of reference frequency 14.4, 16.384, 19.2, 26 MHz, 2ndIF frequency 2.556 MHz
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